Introduction

Field Programmable Gate Arrays (FPGAs) are common platforms for fast prototyping and behavioral verification of processor architectures. Since current FPGAs comprise only volatile flip-flops, their logic elements lose contents whenever power is removed from the system. The invention concerns a new FPGA architecture that enables the emulation and behavioral verification of computing systems exploiting fast non-volatile memories.

Technical features

Current FPGA platforms used for rapid prototyping and behavioral verification of processor architectures contain no elements for handling fast non-volatile logic. The present invention provides an architecture and a process that allow to emulate and validate fast non-volatile architectures using standard FPGAs.

The proposed architecture includes three auxiliary blocks:

1. the intermittency emulation block that emulates irregular power supply typical to energy-harvesting systems;
2. the non-volatile register emulation block that emulates the persistence of the non-volatile registers (as well as the delays of the read/write operations);
3. the power consumption block that approximates the power consumption of the emulated technology.

Possible Applications

• Verification of the typical behavior of transiently-powered computing systems equipped with non-volatile memories;
• Fast-prototyping and debugging non-volatile processor architectures without the production of pre-industrial hardware prototypes.

Advantages

• The architecture is based on the commonly-used off-the-shelf FPGAs;
• Ability to emulate any non-volatile logic powered by unregular power supplies on the FPGA;
• Approximation of the power consumption and of the emulated non-volatile memory technology delay.