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Method for obtaining a porous semiconductor

electrochemical nanolithographylithographyNanolitographySemiconductor


This invention aims to improve, at low cost and on a large scale, the control of the formation of pores at the nanoscale; dimensions for which it is not possible to use optical lithography and techniques of very high spatial precision are required, but involving machinery with a considerable purchase and maintenance cost with very long times for the structuring of the surface.

Technical features

The invention concerns the implementation of a three-steps electrochemical process. The first two steps create two porous layers, one after another, the first involve the density of the pores, and the second involve their surface distribution. The third step consists in the dissolution of this double layer in order to leave a nanoindentation on the surface which, similarly to what happens with the other lithographic processes, provides the starting sites for the subsequent formation of pores. Then all pores can be formed with a density and distribution controlled by the two dissolved layers and not by the process used for their formation. The average pore size (pore size means the size in a direction parallel to the etching surface, for a cylindrical pore it is its diameter) is between 15 and 200 nm, in the second porous layer , and between 10 and 150 nm in the first porous layer.

Possible Applications

  • Sensors with piezoelectric properties;
  • Transport and electrochemical phenomena where nanoscopic cavities are required;
  • Anodes for lithium batteries;
  • Thermoelectric applications;
  • Electronics, optics and optoelectronics;
  • Photonic crystals.


  • Effective lithographic control of pores at the nanoscale;
  • Reduced manufacturing costs;
  • Scalability on large surfaces;
  • Process speed;
  • Possibility of use with low-cost instrumentation.