Method for low power logic in memory circuits
The invention consists of a method and a specific circuit architecture which improve the performance of Logic-in-Memory circuits based on Resistive RAM technology and the material implication logic (IMPLY). The invention solve the intrinsic issues (i.e. logic state degradation, sensitivity to driving voltage variations) present in these circuits and drastically reduces their power consumtion.
The invention consists of a method and a specific circuit architecture for designing low-power non-von Neumann computing architecture, which enables the computation of logic operations directly inside the memory. In fact, the invention improves the performance of Logic-in-Memory circuits based on Resistive RAM technology and the material implication logic (IMPLY) solving their intrinsic issues (i.e. logic state degradation, sensitivity to driving voltage variations) and drastically reducing their power consumption by more than 100 times. These advantages are the result of the reduced complexity of the control voltages and a slight increase in the chip area. The technology can be manufactured using standard CMOS processes and can be built in the Back End of Line (BEOL) of an integrated circuit, thus resulting in a limited area overhead on the final device.
- Internet of Things (IoT);
- Edge computing;
- Parallel computing architecture;
- Wearable devices;
- Artificial intelligence;
- Hardware accelerators.
- Reduced energy consumption;
- Reduced number of devices for logic function;
- Reduced number of operations for logic function;
- Simplified control voltages scheme;
- No logic state degradation;
- Manufactured using standard processes.